The development of semiconductor devices has led to single packaged devices having more functionality, higher pin counts, higher speed, and higher reliability. The development of LSI devices has also created a demand for the use of surface mount technology when packaging semiconductor devices.
A focus has been placed on embodying the semiconductor devices within thin packages having many leads with a very small spacing between the leads. To satisfy these requirements, thin quad-flat packages (TQFPs), thin small-outline packages (TSOPs) and TAB packages have become promising approaches.
The TQFP and TSOP packages can be implemented into a manufacturing facility using equipment from older package assembly processes, while the conventional TAB package requires more updated processing equipment at the manufacturing facility. To reduce the need for this new equipment by utilizing old equipment, a solder bump technique was developed to replace the wire in the TAB process.
Different from the wire bonding technique, the bump technique involves the formation of a metal projection from the semiconductor chip which allows a pad on it to be connected to a lead frame of a tape automated bonding (TAB) package without the use of bonding wire. The solder bump contacts the lead frame directly and therefore performs the function of the wire.
A TAB package is a conventional surface mount bonding technique in which a metal bump is formed on the surface of a semiconductor chip and utilized to bond the terminals of the semiconductor chip to a metal tape incorporated with a copper pattern to function as a lead frame and wires. The TAB technique is a more advanced connection technique because it directly bonds a single LSI circuit to the lead frame without the use of wire.
Three conventional methods for the interconnection of stacked thin packages are disclosed in the report of the "ISHM 92 Proceedings" respectively entitled: "3D Stacking of TSOP Plastic Packages" pp. 370 375; "Development of Solder Bump Fabrication in Multi-chip Modules" pp. 315 and 316, Japan; and "Development of Automatic High-density Solder Ball Mounter, page 93, Japan.
According to the first conventional method disclosed, a wafer fabrication technique is used to make a terminal through a desired portion of the semiconductor chip. Evaporation, photolithography and subsequent etching processes form a metal projection on a semiconductor chip pad located on the periphery of a semiconductor chip.
The second method disclosed attaches a bumped semiconductor chip to a film carrier, using a TAB package. The TAB package is connected to a solder bump placed on the pads at the sides of a semiconductor chip.
In the third method disclosed, a semiconductor chip is attached to a film carrier. The semiconductor chips are then stacked and wire bonded together. After this unit is adhered by an adhesive epoxy, the resulting structure is encapsulated via a potting or molding technique. Then, the wire-bonded portion is cut by means of a diamond blade apparatus to form the wire bonding terminals.
However, the above-described conventional methods for manufacturing the semiconductor devices have the disadvantages of necessitating a more complicated manufacturing process and an increased investment in manufacturing equipment due to the need for the use of a photolithography process or a tape carrier. The conventional methods also contribute to a significant cost for the manufacture of the semiconductor devices.